1. Field of the Invention
Methods and apparatuses consistent with the present invention relate to managing a configuration memory of reconfigurable hardware, and more particularly, to dynamically managing a configuration memory of reconfigurable hardware.
2. Description of the Related Art
Application specific integrated circuits (ASICs) are non-memory semiconductor chips customized for specific electronics, and information and communications products. A field programmable gate array (FPGA) is a semiconductor device containing programmable logic components called logic blocks and programmable interconnects. The logic blocks can be programmed to perform the functions of basic logic gates, such as AND and XOR, and more complex combinational functions, such as decoders. The FPGA may be manufactured to verify the behavior and performance of previously designed hardware before the hardware is finally produced as a semiconductor chip. A hierarchy of the programmable interconnects allows the logic blocks to be interconnected as needed. Furthermore, modern FPGAs can be programmed at runtime so that some circuits perform other works.
Reconfigurable systems using an FPGA or coarse grained array (CGA) are 10 times (or more) slower than general circuits and require many disconnected unnecessary elements, resulting in inefficient space usage. Accordingly, reconfigurable systems using an FPGA or CGA have been used for limited purposes, for example, for programming and verifying the functions of circuits as emulation before prototypes are developed or for developing small quantity products in a short time. Recent developments in technology have offered high-speed high density hardware. Also, as system verification is becoming increasingly important and product cycle is changing rapidly, the applications of reconfigurable systems are increasing.
Hardware reconfigurable systems refer to systems that can reconfigure hardware through programming. Programming is performed using hardware configuration information stored in a memory called a configuration memory. Accordingly, if a plurality of pieces of hardware configuration information necessary for hardware components having different functions are stored in a configuration memory, a hardware reconfigurable system can perform a variety of functions using necessary hardware configuration information pieces. The hardware reconfigurable system meets requirements of application due to its performance that is the advantage of hardware and its flexibility that is the advantage of software.
Here, a configuration memory, which stores hardware configuration information usable to reconfigure hardware included in a hardware reconfigurable system, is a memory that can most rapidly access the reconfigurable hardware. If new hardware configuration information is stored in the configuration memory, the hardware reconfigurable system reconfigures the hardware using the new hardware configuration information stored in the configuration memory. In general, when M denotes the number of a plurality of storage areas constituting the configuration memory and each of the storage areas is a slot, the size of the configuration memory is determined by M×(the size of the slot). Since the configuration memory has M slots, the hardware reconfigurable system including the configuration memory supports multi-context.
Here, multi-context is a method of storing a plurality of pieces of hardware configuration information used to reconfigure hardware in a memory, updating the stored hardware configuration information with other hardware configuration information as needed, and reconfiguring the hardware by using the updated hardware configuration information. A hardware reconfigurable system using multi-context rapidly reconfigures hardware through switch between hardware configuration information stored in a configuration memory.